Courses
Click here to get a list of my Ph.D. students and their work. Click here to get a list of my M.Tech students and their thesis work. Click here to find out about the minor projects of my M.Tech students.
Click
here to get a list of my B.Tech students and their
thesis work. Click
here to find out about the mini projects of my
undergraduate students.
Ph.D.
Theses
Nidhi Agrawal 
Adaptive Routing in Multicomputers (1999) 

M.F. Abdullla 
Integrated Solutions for Builtin Self Test (1998) 

Vineet Sahula 
CAD Tools for Deep Submicron Technology (2001) 

Shampa Chakraverty 
Automated Synthesis of Faulttolerant Realtime Systems
(2002) 
Rahul Kumar 
2002 
IDDQ Testing for SystemonChip Integrated
Circuits 
M.Tech Theses
Student 
Year of Graduation 
Title of the thesis 

Jimmy Louis 
2000 
Modeling and Analysis of
an Adaptive Cellular Network Architecture 

Khushil Kumar Saini 
2000 
Improving the Quality of
Internet Search based on User Feedback 

Prasoon Chandra 
1999 
Design of LowPower Decimation FIR
Filters 

Nagappa Bhajantri 
1999 
Parallel Data Mining 

Rajneesh Khulbe 
1999 
Implementation of Single Precision
Floating Point Adder based on IEEE 754 Format 

Anubhav Srivastava 
1999 
Internet Resource Discovery 

Kailash Pawar 
1999 
Comparison of External Testing and
Builtin Self Test for Embedded Memories 

V. Shanbhogue 
1999 
Pathbased Multicasting for ATM Networks 

Sandeep Goel 
1999 
Test Access Planning for Embedded
Corebased System ICs 

Vishal Dalal 
1999 
Software Power Optimizations in an
Embedded System 

N.V. Balaji 
1999 
Improving the life cycle of Mobile Ad
Hoc Networks through PowerAware Routing Protocols 

Rajesh Kannah 
1999 
Fault Grading for Microprocessor Testing 

Amiav Ghosh 
1999 
Call Admission Algorithms for Advanced
Reservation in ATM Networks 

Dheeraj Dhamija 
1998 
Optimization of Shared WDM
Based Network 

G. Srinivasa Reddy 
1998 
Design of ReliableLocal Area
Networks 

B. Madhu Babu 
1998 
Connection Admission Control
for Heterogeneous Multicasting 

G. Surendhar Rao 
1998 
Performance Analysis and
Simulation of a Nomadic Network 

V. Sankara Subramanian 
1998 
MACE: A Crosstalk Estimator
for DeepSubmicron VLSI Circuits 

Anil Sharma 
1998 
The Implementation of G.726
ADPCM CODEC on ARM Microprocessor and a Coprocessor 

G. Sreenivas 
1998 
Power Constrained Test
Scheduling for Embedded Random Access Memories 

Ashok Khandelwal 
1998 
Behaviorlevel Modelling,
Partitioning, and Design Exploration for a TDMA Receiver 

Sacheendra Nath 
1998 
VLSI Design and Implementation
of Modular Multiplier Chip 

A. Paventhan 
1998 
Parallel RSA Implementation
for Network Security Applications 

Sreenath Y. Bandari 
1998 
Internet Based Component
Selection and Optimization Algorithm 

Ashima Malhotra 
1997 
Design of Digital FIR Filters
for Low Power Applications. 

N. Satya Prasad 
1997 
Low Power Builtin Self Test 

Ram G. Mohan. 
1997 
Development and optimization
of divider and multiplier cells in macro libraries. 

T. Ramesh. 
1997 
Test Suite Development in TTCN
For InterIC Bus Protocol 

Hemant Kumar 
1997 
STIL Extension and its mapping
to TDL 

Dilip Raj Pandit. 
1997 
Connection Admission Control
and Routing in WideArea ATM Networks. 

Bindu John N. 
1997 
Design of A Low Power CORDIC
Chip 

1997 
Cellbased and FPGAbased ASIC
Design of CORDIC. 


Anubhav Mishra. 
1997 
Modeling, Design and
Simulation of A Multitier Cellular Network with Support for Multicasting 

Vedabit Nag 
1997 
Synthesis of Heterogeneous
Multiprocessors 

A.V. Pranatharthi 
1996 
A concurrent approach towards
task scheduling, hardwaresoftware partition, and hardware allocation 

Preeti Sangal 
1996 
Power Optimization through
Layout 

Deepak Aggarwal 
1996 
Hardwaresoftware
partitioning for controldominated applications 

Ajit Dash 
1996 
Subnet Topology Design for
delaybounded multicasting applications 

Akshay Jajoo 
1995 
Highlevel synthesis of
testable data paths 

Ajay Mittal 
1995 
Hierarchical Delay Fault
Simulation 

Vinamra Chandra 
1995 
Parallel Algorithms for
Image Deformation 

Sachidanand Patel 
1994 
Low Power Technology Mapping 

R. Jayaraj 
1994 
Genetic Algorithms for
Shortest Path Algorithms in Graphs 

A. Sham Prakash 
1994 
Design and simulation of a
communication coprocessor for multiprocessors 

B.K. Subramanya 
1994 
Neural algorithms for Call
Admission Control in ATM Networks 

R. Parthiban 
1994 
Parallel Algorithms for
Detection of Image Symmetry 

Rajamani Rajarajan 
1993 
Genetic Algorithms for Scan
Design Problems in VLSI Circuits 

G. Manimaran 
1993 
ATM Switch Architecture based
on Indirect Star Graphs 

Hemant Joshi 
1993 
HISCOAP : A Hierarchical
Testability Analysis Tool 

Naresh Vedi 
1993 
Heuristic and Neural
Algorithms for Scheduling and Mapping tasks to Reconfigurable Arrays 

Amit Kumar Gupta 
1993 
Genetic Algorithms for mapping
tasks to Reconfigurable Arrays 

Prakash Easwar 
1993 
Routing algorithms for Star
Graphs 

R.K. Gandhi 
1992 
Parallel Neural
Algorithms for Travelling Salesperson Problem 

Shampa Chakraverty 
1992 
VLSI Implementation of a
faultsecure ALU 

S. Rajalakshmi 
1992 
Parallel searchandlearn
algorithms for Travelling Salesperson Problem 

R. Kocher 
1992 
Parallel algorithm for
solving a system of linear equations 

Students 
Year 
Thesis Title 
Nitin Kakkar and S. Chopra 
2000 
Mutual Testing of IC Cores using
Discrete Wavelet Transform 
N. Mangal and P. Gupta 
2000 
HardwareSoftware Partitioning in a
Reconfigurable Environment 
Gaurav
Chandra and Ashutosh Verma 
1999 
Testing of Corebased
Systems. 1999. Awarded Best B.Tech Project (Bambawale Award) 
Meeta Sharama and Prachi
Jain 
1999 
Topology Design of WDM
Networks. Nominated for Best B.Tech Project Award 
S. Chopra and P. Kamal 
1999 
Interconnect Testing in
Corebased Systems 
Girish Kumar/Nishit Narang 
1998 
Delaybounded multicasting
algorithms 
Amit Sinha/Praful
Kaul 
1998 
Testability issues in
corebared design 
Ankur Srivastava/Sachin Gupta 
1998 
Systemlevel Partitioning Tool
(SABRE) 
Shishir Sharan/Madhur Agarwal 
1998 
Web Caching Protocol 
K. Viswanathan/Pradeepta Roy
Choudhury 
1998 
Design Reuse in Internetbased
Design 
Ravi Srivastava/Amit Mitra 
1998 
Datapath synthesis from VHDL
Descriptions 
Sameer Gupta/Atul Saroop 
1998 
Heterogeneous Multiprocessor
Synthesis 
Manish Sharma/Deepak
Sharma 
1997 
Diagnosability Enhancement
through Test Point Insertion 
Pankaj Bansal/Vikram
Magoon 
1997 
HardwareSoftware
Partitioning for Low Power 
Ramnik Bajaj 
1997 
Distributed Algorithms for
Delaybounded Multicasting 
Rajat Aggarwal/Chandan
Sharma 
1995 
Graph algorithms for
multiport memory based data path synthesis 
Mukul Prasad/Lavmeet Hora 
1995 
Hierarchical Estimation of
Power in Integrated Circuits 
Nitin Agrawal/Parul
Agarwal/Gurjeet Saund 
1995 
Hierarchical algorithms
for Delay Testing and Testability Analsysis 
Anurag Dod/Vikas Jain 
1995 
Distributed Algorithms for
Fault Simulation 
Sumit Gupta 
1995 
An Artificial Intelligence
Approach to Testabilityoriented Synthesis 
Vikram Saxena 
1994 
TOGAPS: A Testabilityoriented Genetic
Algorithm for Pipeline Synthesis 
Varun Verma/Tarun Rai 
1994 
Kautz Graphs as attractive logical
topologies in WDM Networks 
Nikhil Sharma/Deepankar Aron 
1994 
Testabilityoriented layout 
Rahul Dani/Manish Gupta 
1994 
Parallel Neural Algorithms for Task
Scheduling and Mapping 
Vikas Jain/Gurjeet Thandi 
1994 
Simulated Annealing for Technology
Mapping 
Anand Mohan Goel 
1994 
Deadlockfree algorithms for wormhole
routing in Star Graphs 
Alok Kuchlous 
1993 
Faulttolerant Interconnection Networks 
Student 
Year 
Thesis Title 
Jimmy Louis 
2000 
Parallel algorithm for Encryption (RSA) 
Rama Shankar 
2000 
Parallel algorithm for Encryption (Zero
Knowledge Proofs) 
Nilay Mistry 
2000 
Secure communication 
Dheeraj Nigam 
2000 
Product flow management 
Anita Sarkar 
2000 
Differentiated Internet service 
Prashant Chugh 
2000 
Differentiated Internet Service 
Ramanath Shanbhog 
2000 
Routing in Mobile networks 
Anubhav Srivastava 
1999 
Parallel algorithm for integer
factorization 
Bharat Singh 
1999 
Euler pathbased multicasting in
networks 
Amitav Ghosh 
1999 
Multiple views of a graph using JAVA 
Nagappa Bhajantri 
1999 
Multicasting in WDM Networks 
Madhu Babu 
1998 
SMART+ Protocol for Multicasting 
G.S. Reddy 
1998 
Repairable Multicast Trees 
Sacheendra Nath 
1998 
Crosstalk minimization in Digital
Circuits 
G. Sreenivas 
1998 
Power Estimation 
Surendhar Rao 
1998 
Wireless network for IIT Delhi 
Anubhav Mishra 
1997 
Local Area Network Redesign 
Dilip Raj Pandit 
1997 
Local Area Topology Design 
Ram G. Mohan 
1997 
Technology Mapping for Low Power with
timing constraints 
Rohit Sharma 
1997 
Using highlevel synthesis tools to
synthesize ASICs : CORDIC 
Ashima Malhotra 
1997 
Multiple Signature Delay Testing 
Bindu John 
1997 
Low Power CORDIC 
Brito Marceline 
1993 
Load balancing in distributed
systems 
Satya Prasad 
1997 
Low Power Coding Techniques 
B.K. Subramanya 
1993 
Routing algorithms in Multiply twisted
hypercubes 
Hemant Joshi 
1992 
Parallel Algorithm for Test
Pattern Generation 
G. Manimaran 
1992 
Incomplete Star Graphs : An economical,
Faulttolerant Interconnection Network 
Rajamani Rajarajan 
1992 
Genetic Algorithm for Multiple Scan
Design 
Shampa Chakraverty 
1992 
ASIC Design using Silicon
Compilers 
R.K. Gandhi 
1992 
Parallel Algorithm for Hough Transform
on a Meiko Transputer 
Haroon Rasheed 
1992 
Partial Scan Design using Simulated
Annealing 
B.Tech Minor
Projects
Year 
Thesis Title 

Vivek Aggarwal 
2000 
Fault modeling for pipelined computers 
Nitij Mangal 
1999 
Independent study on Cluster Computing 
Sachin Adlakha 
1999 
Independent study on Distirbuted
Computing 
Puneet Sethi 
1999 
Independent study on Distirbuted
Computing 
Chetan Chopra/Paramjeet Singh 
1998 
Placement for maximizing signal
integrity 
Saurav Chopra 
1998 
Multicasting Issues in ATM Networks 
Anurag Vohra 
1997 
Fuzzy logic for solving travelling
salesperson problem 
Jayanto Minocha+Rajul Aggarwal 
1997 
MCM Paritioning using Genetic
Algorithms 
Kanu Chaddha+Ram Sadhwani 
1997 
Graph algorithms for test
synthesis 
Sagheer Ahamd+Vaibhav Agarwal 
1995 
Multipath cover problem and its
application to routing 
Abhishek Goel 
1995 
Associate Memory for LAN bridges 
Abhay Gupta+Renny Thomas 
1995 
Genetic Algorithm for Optical Array
Assignment (SURA) 
Vaibhav Agarwal 
1995 
Multipath cover problem and its
application to routing 
Manish Sharma 
1996 
Diagnosis of digital circuits
(SURA) 
Nikhil Sharma+Deepankar Aron 
1993 
Parallel Genetic Algorithm for Placement 