
Ph: 91-80-25269451
FAX: 91-80-25048213
E-mail:
Testing for Nanometer-related Failures,
Low-power Testing, At-speed Testing, Test Compression, Yield Improvement
Low-power test, variability issues in
test
Test Vector Validation
Memory Testing ,
Hierarchical Testing
Built-in Self Test ,
IDDQ Testing , Functional Testing of Microprocessors ,
Testing of core-based systems , Fault Diagnosis
Design flow analysis and optimization,
System-level Synthesis, High-level Synthesis
Low-power Design Techniques, Deep Submicron Design and Test, Embedded Systems
Distributed Computing,
Distributed/Parallel algorithms for Resource Discovery
Parallel Algorithms, Heterogeneous Multiprocessors, Storage Area Networks,
Embedded Systems
Routing and Multicasting ,
Interconnection
Networks
Most
of the papers can be downloaded from IEEE online library or from appropriate
conference archives. You can also visit www.scholar.google.com
and get the citation information on my publications. Sorry, I don’t have downloadable PDFs on my site. If you need any specific paper, I may be
able to send the softcopy.
·
Honorary Secretary of the VLSI Society of
India (since August, 2003)
·
Honorary Secretary of the IEEE
Circuits and Systems Society,
·
Senior Member, IEEE (since 2004);
Member of IEEE Circuits and Systems Society, IEEE Computer Society, and IEEE
Education Societies.
·
Fellow, Indian Microelectronics
Society (since 2003)
·
Member, IETE (since 1994)
·
IEEE TTTC Group Vice Chair,
·
Member of the University Relations
Sub-committee of the
·
Honorary member of the Board of
Studies for
1.
Visweswaraya Technological University, Karnataka
2.
3.
4.
SJCE,
Tutorials
·
Teaching
the course on “DSP and Embedded Systems” (jointly with Prof. S.
·
4-day
tutorial on Design for Test at Noida, organized by
VLSI Society of India (Jointly with
Prof. S.M. Reddy, U. of Iowa and Nilanjan Mukherjee, Mentor Graphics)
·
1-day
tutorial on “Embedded Systems-on-Chip – Recent trends and future
directions” on March 17, 2007 at Banasthali Vidyapeeth, Rajasthan (as part of the DST-sponsored workshop
on Models of Computation)
·
Innovative
Practices session at VTS 2007 (Joint organizer with
·
1-day
tutorial at TIMA conference, National Institute of Technology, Trichy, Jan 4, 2007
·
3-day
tutorial on DFT organized by VLSI
Society of India on the topic of Design for Test at New Delhi, December 2005
(Jointly with Vishwani D. Agrawal)
·
Delivered
a 1.5-day tutorial on Design for Testability of Digital Systems at VNR VJIET,
·
Delivered
a 2-hr tutorial on “Industrial Perspectives in Design for
Test”, August 2006,
·
Delivered
a 1-week course on DFT at BITS, Pilani during Feb
2006
·
Delivered
a half-day tutorial on VHDL at the VLSI Education Workshop organized by NIST, Berhapmpur, October 2005.
·
Delivered
a half-day tutorial on “System-on-Chip Design & Test” at the VLSI
Education Workshop organized by NIST, Berhapmpur,
October 2005.
·
Invited
Tutorial on “CAD of Integrated Circuits” at VLSI Education
Workshop,
·
Tutorial
on Challenges in System-on-Chip Design at the IEEE TENCON 2003,
·
Invited talk on “Embedded Systems”
at National Engineering Conference,
·
Invited talk on “Challenges in the
design of VLSI Systems” at Sri Venkateshwara
College of Engineering, Chennai (March 13, 2009)
·
Invited talk on “Fifty Years of Semiconductor
Innovation” at Pragyaa 2009 Student Technical
Conference, Sri Guru Govind Singhji Institute of
Technology, Nanded, March 6, 2009
·
Keynote Talk entitled “Industrial
Applications in the coming years - Why we need to spend higher energy on
low-power” at ISCO 2009,
·
Talk entitled “Embedded
Systems” for 4th Semester students of RNS Institute of
Technology,
·
Talk entitled “Semiconductor
Innovation for Tomorrow’s Medicine” at Nitte
Meenakshi Institute of Technology,
·
Keynote Talk entitled “VLSI + Communications
+ Wireless Networks = Embedded Systems” at
VCAN conference,
·
Talk entitled “Semiconductor
Innovation for Tomorrow’s Medicine” at the
·
Talk entitled “Challenges of VLSI
Design,” as part of the Industrial Lecture Series at IIT
·
Talk entitled “Introduction to
Design for Test,” IIT
·
Talk entitled “DSP and Embedded
Systems – The Next Frontier,” delivered at the VSI workshop on DSP
and Embedded Systems, August 2008, VNR-VJIET,
·
Keynote Talk, “DSP and Embedded
Systems – The Next Frontier,” Delivered at the Faculty workshop on
DSP and Matlab held at RNSIT,
·
Keynote Talk, “Embedded Systems
– The next frontier,” Delivered at the Faculty Workshop on DSP and Matlab held at PESSE,
·
Keynote Talk, “Embedded Systems
– The next frontier,” delivered at MSRSAS,
·
Keynote Talk, “Signals and Systems - The next
frontier,” delivered at
·
Keynote Talk, “How Computing,
Communication and Control are changing and what we can do to keep
abreast” delivered at
·
Technical Talk, “Design Challenges
for modern command-communication-control systems,”
·
Technical Talk, “Design Challenges for
modern command-communication-control systems,”
·
Technical Talk on “Variability
Issues in Test,” at IMAPS Conference,
·
Technical Talk on “Challenges in
VLSI/Embedded Systems Design” given to final-year students of IIT
·
Technical Talk on “Challenges in
VLSI Design” given to students of final year Electrical Engineering of
·
Technical Seminar on “Glitch-aware
Test Pattern Generation” at
·
Keynote talk, National Conference on
‘Design Techniques for Modern Electronic Devices, VLSI &
Communication Systems DTVC-07’, NIT Hamirpur,
May 14, 2007
·
Talk at RV
·
Invited
speaker at SIT Tumkur, 18 Feb 2007 – Talk on
“Professional Practices for the Microelectronics Professional”
·
Invited
talk on “The challenge of low power test – just when you thought
low power design was under control” at TIMA, NIT Trichy,
Jan 5, 2006
·
Delivered
a seminar on “Challenges in VLSI Test” at RV
·
Delivered
a seminar on ”Challenges in VLSI Test” at Interra
Systems, Kolkata, Sep 2006
·
Delivered
the keynote talk on “Challenges in VLSI Design and Test” at
Quintessence 2006, a National Level Technical Symposium held at
·
Delivered
a seminar at Computer Engineering,
·
Delivered
an invited talk on the topic of “Talent Creation in VLSI” as part
of the Industry Forum, VLSI Design Conference, Jan
2006.
·
Delivered
a talk on the topic of “Challenges of Testing Digital VLSI Systems”
at VTU,
·
Delivered
a talk on the topic of “Signal Integrity Issues in VLSI Test” at
the VLSI Signal Integrity Workshop,
·
Delivered
an invited talk on the topic of “Practicing Transition-Fault Testing with Physical-Design-Friendly Flows”
at UT
·
Delivered
an invited talk on the topic of “Indian Semiconductor Industry” at
the IEEE TTTC Technical Forum in honor of Prof. Sudhakar Reddy, November, ITC,
2005
·
Delivered
an invited talk on the topic of “Multiprocessor Architectures for
Embedded SoC” at Mindtree
Technical Festival, 2005.
·
Delivered
a keynote talk on the topic of “Multiprocessor Architectures for Embedded
SoC” at INDICON 2005, IIT
·
Delivered
an invited talk on the topic “Embedded
System Design for Low Power using a Genetic Algorithm” at the
ISA-IEEE Day, August 2005
·
Delivered
an invited talk on the topic “Testing of Nanometer Chips” at VEDAS
2005,
·
Delivered
a talk on “Challenges in the System-on-Chip Design” to students and
faculty of VTU
·
Invited
talk on “Recent Advances in VLSI Test”, at the National Workshop on Challenges
in VLSI. DA-IICT,
·
Invited
talk on “VLSI CAD Tools” at the VSI Workshop on VLSI Education,
SJCE,
·
Invited
Talk on “Recent Advances in VLSI Test (Scan Test Compression),” at
the VSI Workshop on VLSI Education, Jaipur. March
2005.
·
Invited
Talk on “Recent Advances in VLSI Test” at Apogee Student Technical
Festival, BITS Pilani, February 2005
·
Invited
talk on “Low Power Design Techniques” at the VSI Workshop on Low
Power Design,
·
Coordinated
a Panel on “VLSI Education” at the VLSI Design Conference
Industrial Forum, Kolkata, January 2005
·
Inaugural
Talk at ECBLITZ 2004, the Student Technical Festival, PSNA
·
Invited
Talk at
·
Invited
Talk on “Implementation
Fabrics for Programmable Systems-on-Chip,” at VEDAS-2004,
·
Invited
Talk at IETE,
·
Invited
Talk on “Design for Manufacturability” at the Workshop on
Reconfigurable Computing at MNIT, Jaipur, March 2004
·
Keynote
talk at 17th International Conference on VLSI Design. January 2004, Mumbai, entitled “Multiprocessor
Architectures for Embedded System-on-Chip Applications”
·
Invited
talk at IIIT
·
Invited
talk at the inauguration of IEEE Chapter at MSRIT,
·
Invited
talk at the 3-day Workshop on VLSI and MEMS, SJCE,
·
Panelist
at the Student Festival held at SJCE,
·
Invited
talk delivered at SASKEN,
·
Invited
talk at SJCE,
·
Keynote
talk at the two-day workshop on VLSI held at RVCE,
·
Invited
talk entitled “Impact
of Nanometer Related Timing Impact of Nanometer Related Timing Failures Failures on At on At-speed Testing speed Testing” at National Seminar on SoC, SASTRA Tanjavur, 2003
·
Panelist
at the panel discussion held at National Seminar on SoC,
SASTRA, Tanjavur, 2003 (Topic: SoC
– Reality or Hype?)
·
Invited
talk entitled “Multiprocessors – Past, Present, Future” at
IIT
·
Invited
talk entitled “Challenges in VLSI Test at BITS, Pilani
as part of APOGEE 2003, Student Festival, February 2003
·
Moderator
of panel discussion on “Challenges in Developing an Effective
VLSI/embedded Systems Curriculum” at Workshop on VLSI Design for Embedded
Systems, Malaviya National Institute of Technology, Jaipur, December 2003
·
Invited
Talk on “Real-Time Projects Semiconductor & Chip Design”
delivered at
·
Invited
talk on “Introduction to Semiconductors” delivered at
·
Invited
Talk on “The Challenges in
Designing Embedded System-on-Chip” delivered at the Two-day
workshop on VLSI and Embedded Systems at
·
Invited
Talk at Novell on “Perspectives on Testing Hardware-Software Systems”,
July 2002
·
Invited
Talk on Trends in VLSI Design delivered at CRL, BEL, 22 May 2002