I coordinated this 6-day short course and taught it jointly with Prof. Anshul Kumar, Prof. M. Balakrishnan, Prof. B. Bhaumik, and Prof. G.S. Visweswaran. Anup Gangwar and Rajat Sadana helped me with the lab software. The course was organized especially for Virage Logic, Noida.
(Snap shot taken at the closing ceremony of the short course, held in the Nilgiri Hostel. Prof. Anshul Kumar, Alok Singh, and C.P. Ravikumar. Also seated is a little guest who accompanied CPRK.)
I coordinated the 5-day course and taught it jointly with Dr M.N. Gupta. I was assisted by students: M.M. Sufyan Beg, Jimmy Louis, Dheeraj Nigam, and Anubhav Srivastava. The course was held mainly for scientists of SAG, DRDO.
I and Prof. Vinod Chandra jointly
coordinated a short course on Fault-tolerant Real-time Systems for industrial
participants. The course duration was Oct 25-Nov 4, 1999.
Participants came from Indian Railways, CDOT, CRL (BEL), HFCL, and WEBFIL.
There were 25 participants in all. Apart from faculty from the EE Department at
IIT Delhi, the following guest faculty were involved.
K. Johari, CRL (BEL), Ghaziabad
A. Khandelwal, CDOT
Hemant Kumar, Qualcomm, San Diego, USA
V. Mitra, HFCL
Andrew. Saks, Intel Malaysia
Anand Srivastava, CDOT
I coordinated the EE398S course (Professional Practices) during the
Spring semester (1999). The aim of the course is to impart knowledge of
There were seminars given by Bob Pease (Natsem), Rajamohan Varambally (ST
Microelectronics, India), Saugat Sen (Cadence Design Systems, India), Pradeep
Dubey (IBM SRC, India), Rubin Parekhji (Texas Instruments, India), Sumit Gupta
(UC Irvine), Thomas Major (Philips Software Center, Bangalore), Ranjan Bhaumik
(Nuclear Science Center), and S.C. Dutta Roy (IIT Delhi). All the seminars were
sponsored by IEEE Delhi Chapter and the IEEE Joint Society on Circuits &
Systems and Control. We thank all the speakers and IEEE.