List of Conference Publications on VLSI Automation

  1. C.P.Ravikumar .Solving Physical Design problens on Vector Supercomputers.In the Proceedings of the International Conference on VLSI Design (IEEE),Banglore,India January 1993.

  2. C.P.Ravikumar and S. Chakaraverty. ASIC Design using Silicon Compilers - - Example of an FIR filter , SIGCOM-93, Indian Institute of Science , Banglore 1993.

  3. C.P.Ravikumar and A. Kuchlous. Two-way Partitioning of Shuffle-Exchange and DeBruijn Graphs.In the Proceedings of the National Symposium on Theoritical Computer Science , Kharagpur , India . June 1993 . pp.1-10.

  4. C.P. Ravikumar and H. Rasheed. Simulated annealing for target-oriented Partial Scan. In the proceedings of the Internatiional Confrance on VLSI design (IEEE), Calcutta, India, January 12994.pp.1--19.

  5. C.P.Ravikumar and A. Shyamprakash. VLSI Implementation of a WormholeRouter using Virtual channels. In the proceedings of the IEEE Tencon, Singapore, 1994.pp.1035 --1039

  6. C.P.Ravikumar and R.Aagrawal. A Parallel Search-and-learn Algorithm for Graph coloring. In the proceedings of the First Internationa Workshop on Parallel Processing(IEEE),Banglore,India,December 1994.

  7. C.P.Ravikumar and H.Joshi.HISCOAP--A Hirearchical Testability Analysis Tool. In Preceedings of the International conference of VLSI design (IEEE),,New Delhi, India, 1995,Pages 272-277.

  8. C.P.Ravikumar ,V.Jain and G.S.Thandi. Simulated annealing for Technology Mapping in FPGAs.In the proceedings of the National System Conferance, Agra, January , 1995.pp.400 - 405.

  9. C.P.Ravikumar and A. Shyamprakash. Verilog Modeling and Simulation of a Communication Coprocessor for Multicomputers. Open Verilng Interface Conference, Santa Barbra,1995.

  10. C.P.Ravikumar. A Redundant Arithmetic CORDIC Chip. Proceedings of SPCOM-95,National Meeting of signal processing and Communication, Banglore ,India.August 1995.

  11. C.P.Ravikumarand V.Sexena.Synthesis of Testable Pipelined Datapaths using Genetic Search.Preceedings of VLSIdesign96, Banglore India 1996.

  12. M.F. Abdullah, CP. Ravikumar and Anshul Kumar. A Novel BIST Architecture based on Built-in Self check.Preceedings of VLSI design 96,Banglore India 1996.

  13. C.P.Ravikumar and R.Rajrajan.Genetic Algorithms for Scan design Problems. Preceedings of VLSIdesign 96,Banglore India 1996.

  14. C.P.Ravikumar and M.R.Prasad and L.s.hora.Estimation of Power from Module-level Netlists. Preceedings of VLSIdesign 96,Banglore India 1996.